Technical FAQs 3

What is a Sierra RF transceiver?

About MaxLinear’s Sierra Radio SoC Solution Sierra’s RF transceiver uses a low-power wide-band Zero-IF (ZIF) architecture and supports 8 transmitters (TX) and 8 receivers (RX) with 2 feedback receivers (FBRX). Each RX supports wide signal bandwidths up to 400MHz and each TX and FBRX supports signal bandwidths up to 900MHz.

What interfaces does Sierra support?

Sierra supports an O-RAN fronthaul Split Option 7.2x Category A interface with up to four 10 or 25Gbit/s Ethernet interfaces. Sierra integrates an embedded CPU for system control. The CPU is an integrated quad-core Arm® A53 processor with Neon™ extensions.

What kind of processor does the Sierra RF radio have?

The CPU is an integrated quad-core Arm® A53 processor with Neon™ extensions. Each Arm® core has 1MB of internal SRAM and has access to an additional 8GB of external DRAM through a DDR controller. For more information on the Sierra RF Radio SoC or MaxLIN DPD linearization technology, visit: About MaxLinear, Inc.

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